Intel® MAX® 10 FPGA Configuration User Guide

ID 683865
Date 3/27/2023
Document Table of Contents

3.6.2. Enabling Error Detection

The CRC error detection feature in the Intel® Quartus® Prime software generates the CRC_ERROR output to the optional dual-purpose CRC_ERROR pin.

To enable the error detection feature using CRC, follow these steps:

  1. Open the Intel® Quartus® Prime software and load a project using Intel® MAX® 10 device family.
  2. On the Assignments menu, click Device. The Device dialog box appears.
  3. In the Device dialog box, click Device and Pin Options. The Device and Pin Options dialog box appears.
  4. Click Device and Pin Option. The Device and Pin Option dialog box appears.
  5. In the Device and Pin Option dialog box, select Error Detection CRC from the category pane.
  6. Turn on Enable Error Detection CRC_ERROR pin.
  7. In the Divide error check frequency by field, enter a valid divisor.
    The divisor value divides down the frequency of the configuration oscillator output clock. This output clock is used as the clock source for the error detection process.
  8. Click OK.

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