Intel® MAX® 10 FPGA Configuration User Guide

ID 683865
Date 3/27/2023
Public
Document Table of Contents

3.1.1.1. JTAG Pin Sharing Behavior

Table 27.  JTAG Pin Sharing Behavior for Intel® MAX® 10 Devices
Configuration Stage JTAG Pin Sharing JTAGEN Pin JTAG Pins (TDO, TDI, TCK, TMS)
User mode Disabled User I/O pin Dedicated JTAG pins.
Enabled Driven low User I/O pins.
Driven high Dedicated JTAG pins.
Configuration Don’t Care Not used Dedicated JTAG pins.
Note: You have to set the pins according to Dual-Purpose Configuration Pin Guidelines for Intel MAX 10 Devices and with correct pin direction (input, output or bidirectional) for the JTAG pins work correctly.

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