MAX® 10 FPGA Configuration User Guide

ID 683865
Date 5/14/2025
Public

Visible to Intel only — GUID: sss1458889343284

Ixiasoft

Document Table of Contents

3.9.1. Internal and External JTAG Interfaces

There are two interfaces to access the JTAG control block in MAX® 10 devices:

  • External JTAG interface—connection of the JTAG control block from the physical JTAG pins; TCK, TDI, TDO, and TMS.
  • Internal JTAG interface—connection of the JTAG control block from the internal FPGA core fabric.

You can only access the JTAG control block using either external or internal JTAG interface one at a time. External JTAG interfaces are commonly used for JTAG configuration using programming cable. To access the internal JTAG interface, you must include the JTAG WYSIWYG atom in your Quartus® Prime software design.

Figure 16. Internal and External JTAG Interface Connections
Note:

To ensure the internal JTAG interfaces of MAX® 10 devices function correctly, all four JTAG signals (TCK, TDI, TMS and TDO) in the JTAG WYSIWYG atom need to be routed out. The Quartus® Prime software will automatically assign the ports to their corresponding dedicated JTAG pins.