Visible to Intel only — GUID: sss1394536695560
Ixiasoft
Visible to Intel only — GUID: sss1394536695560
Ixiasoft
3.2.3. JTAG Configuration Setup
To configure a device in a JTAG chain, the programming software sets the other devices to bypass mode. A device in bypass mode transfers the programming data from the TDI pin to the TDO pin through a single bypass register. The configuration data is available on the TDO pin one clock cycle later.
The Intel® Quartus® Prime software uses the CONF_DONE pin to verify the completion of the configuration process through the JTAG port:
- CONF_DONE pin is low—indicates that the configuration has failed.
- CONF_DONE pin is high—indicates that the configuration was successful.
After the configuration data is transmitted serially using the JTAG TDI port, the TCK port is clocked to perform device initialization.
Preventing Voltage Overshoot
To prevent voltage overshoot, you must use external diodes and capacitors if
maximum AC voltage for both VCCIO and JTAG header exceed 3.9 V. However, Intel recommends that you use the external diodes and capacitors if the supplies exceed 2.5 V.JTAGEN
If you use the JTAGEN pin, Intel recommends the following settings:
- Once you entered user mode and JTAG pins are regular I/O pins—connect the JTAGEN pin to a weak pull-down (1 kΩ).
- Once you entered user mode and JTAG pins are dedicated pins—connect the JTAGEN pin to a weak pull-up (10 kΩ).
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