Intel FPGA Integer Arithmetic IP Cores User Guide

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ID 683490
Date 10/05/2020
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Document Table of Contents

8.6.3. Multipliers Tab

Table 32.  Multipliers Tab
Parameter IP Generated Parameter Value Default Value Description
What is the representation format for Multipliers A inputs? gui_representation_a

SIGNED,

UNSIGNED,

VARIABLE

UNSIGNED Specify the representation format for the multiplier A input.
Register ‘signa’ input gui_register_signa

On

Off

Off Select this option to enable signa register.

You must select VARIABLE value for What is the representation format for Multipliers A inputs? parameter to enable this option.

What is the source for clock input? gui_register_signa_clock

Clock0

Clock1

Clock2

Clock0 Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for signa register.

You must select Register ‘signa’ input to enable this parameter.

What is the source for asynchronous clear input? gui_register_signa_aclr

NONE

ACLR0

ACLR1

NONE Specifies the asynchronous clear source for the signa register.

You must select Register ‘signa’ input to enable this parameter.

What is the source for synchronous clear input? gui_register_signa_sclr

NONE

SCLR0

SCLR1

NONE Specifies the synchronous clear source for the signa register.

You must select Register ‘signa’ input to enable this parameter.

What is the representation format for Multipliers B inputs? gui_representation_b

SIGNED,

UNSIGNED,

VARIABLE

UNSIGNED Specify the representation format for the multiplier B input.
Register ‘signb’ input gui_register_signb

On

Off

Off Select this option to enable signb register.

You must select VARIABLE value for What is the representation format for Multipliers B inputs? parameter to enable this option.

What is the source for clock input? gui_register_signb_clock

Clock0

Clock1

Clock2

Clock0 Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for signb register.

You must select Register ‘signb’ input to enable this parameter.

What is the source for asynchronous clear input? gui_register_signb_aclr

NONE

ACLR0

ACLR1

NONE Specifies the asynchronous clear source for the signb register.

You must select Register ‘signb’ input to enable this parameter.

What is the source for synchronous clear input? gui_register_signb_sclr

NONE

SCLR0

SCLR1

NONE Specifies the synchronous clear source for the signb register.

You must select Register ‘signb’ input to enable this parameter.

Input Configuration
Register input A of the multiplier gui_input_register_a

On

Off

Off Select this option to enable input register for dataa input bus.
What is the source for clock input? gui_input_register_a_clock

Clock0

Clock1

Clock2

Clock0 Select Clock0 , Clock1 or Clock2 to enable and specify the register input clock signal for dataa input bus.

You must select Register input A of the multiplier to enable this parameter.

What is the source for asynchronous clear input? gui_input_register_a_aclr

NONE

ACLR0

ACLR1

NONE Specifies the register asynchronous clear source for the dataa input bus.

You must select Register input A of the multiplier to enable this parameter.

What is the source for synchronous clear input? gui_input_register_a_sclr

NONE

SCLR0

SCLR1

NONE Specifies the register synchronous clear source for the dataa input bus.

You must select Register input A of the multiplier to enable this parameter.

Register input B of the multiplier gui_input_register_b

On

Off

Off Select this option to enable input register for datab input bus.
What is the source for clock input? gui_input_register_b_clock

Clock0

Clock1

Clock2

Clock0 Select Clock0 , Clock1 or Clock2 to enable and specify the register input clock signal for datab input bus.

You must select Register input B of the multiplier to enable this parameter.

What is the source for asynchronous clear input? gui_input_register_b_aclr

NONE

ACLR0

ACLR1

NONE Specifies the register asynchronous clear source for the datab input bus.

You must select Register input B of the multiplier to enable this parameter.

What is the source for synchronous clear input? gui_input_register_b_sclr

NONE

SCLR0

SCLR1

NONE Specifies the register synchronous clear source for the datab input bus.

You must select Register input B of the multiplier to enable this parameter.

What is the input A of the multiplier connected to? gui_multiplier_a_input

Multiplier input

Scan chain input

Multiplier input Select the input source for input A of the multiplier.

Select Multiplier input to use dataa input bus as the source to the multiplier.

Select Scan chain input to use scanin input bus as the source to the multiplier and enable the scanout output bus.

This parameter is available when you select 2, 3 or 4 for What is the number of multipliers? parameter.

Scanout A Register Configuration
Register output of the scan chain gui_scanouta_register

On

Off

Off Select this option to enable output register for scanouta output bus.

You must select Scan chain input for What is the input A of the multiplier connected to? parameter to enable this option.

What is the source for clock input? gui_scanouta_register_clock

Clock0

Clock1

Clock2

Clock0 Select Clock0 , Clock1 or Clock2 to enable and specify the register input clock signal for scanouta output bus.

You must turn on Register output of the scan chain parameter to enable this option.

What is the source for asynchronous clear input? gui_scanouta_register_aclr

NONE

ACLR0

ACLR1

NONE Specifies the register asynchronous clear source for the scanouta output bus.

You must turn on Register output of the scan chain parameter to enable this option.

What is the source for synchronous clear input? gui_scanouta_register_sclr

NONE

SCLR0

SCLR1

NONE Specifies the register synchronous clear source for the scanouta output bus.

You must select Register output of the scan chain parameter to enable this option.

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