Intel FPGA Integer Arithmetic IP Cores User Guide

ID 683490
Date 10/05/2020
Public
Document Table of Contents

5.3. VHDL Component Declaration

The VHDL component declaration is located in the VHDL Design File (.vhd) LPM_PACK.vhd in the < Intel® Quartus® Prime installation directory>\libraries\vhdl\lpm directory.

component LPM_ADD_SUB
        generic (LPM_WIDTH : natural; 
LPM_DIRECTION : string := "UNUSED";
LPM_REPRESENTATION: string := "SIGNED";
LPM_PIPELINE : natural := 0;
LPM_TYPE : string := L_ADD_SUB;
LPM_HINT : string := "UNUSED");
port (DATAA : in std_logic_vector(LPM_WIDTH-1 downto 0);
DATAB : in std_logic_vector(LPM_WIDTH-1 downto 0);
ACLR : in std_logic := '0';
CLOCK : in std_logic := '0';
CLKEN : in std_logic := '1';
CIN : in std_logic := 'Z';
ADD_SUB : in std_logic := '1';
RESULT : out std_logic_vector(LPM_WIDTH-1 downto 0);
COUT : out std_logic;
OVERFLOW : out std_logic);
end component;

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