Intel FPGA Integer Arithmetic IP Cores User Guide

Download
ID 683490
Date 10/05/2020
Public
Document Table of Contents

8.1.1.2. Pre-adder Coefficient Mode

In this mode, one multiplier operand derives from the pre-adder, and the other operand derives from the internal coefficient storage. The coefficient storage allows up to 8 preset constants. The coefficient selection signals are coefsel[0..3].

This mode is expressed in the following equation.



The following shows the pre-adder coefficient mode of a multiplier.

Figure 11. Pre-adder Coefficient Mode


Did you find the information on this page useful?

Characters remaining:

Feedback Message