Intel FPGA Integer Arithmetic IP Cores User Guide

ID 683490
Date 10/05/2020
Public
Document Table of Contents

14.3. VHDL Component Declaration

The VHDL component declaration is located in the VHDL Design File (.vhd) altera_mf_components.vhd in the < Intel® Quartus® Prime installation directory>\libraries\vhdl\altera_mf directory.

component parallel_add 
   generic (
      width : natural := 4;    
      size : natural := 2;    
      widthr : natural := 4;    
      shift : natural := 0;    
      msw_subtract : string  := "NO";    
      representation : string  := "UNSIGNED";    
      pipeline : natural := 0;    
      result_alignment : string  := "LSB";
      lpm_hint: string  := "UNUSED";    
      lpm_type : string  := "parallel_add");
   port (
      data:in altera_mf_logic_2D(size - 1 downto 0,width- 1 downto 0);   
      clock : in std_logic := '1';
      aclr : in std_logic := '0';
      clken : in std_logic := '1';
      result : out std_logic_vector(widthr - 1 downto 0));
end component;

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