Intel FPGA Integer Arithmetic IP Cores User Guide

ID 683490
Date 10/05/2020
Public
Document Table of Contents

7.5. VHDL Component Declaration (ALTECC_DECODER)

The VHDL component declaration is located in the VHDL Design File (.vhd) altera_mf_components.vhd in the < Intel® Quartus® Prime installation directory>\libraries\vhdl\altera_mf directory.

component altecc_decoder
generic (
intended_device_family:string := "unused";
lpm_pipeline:natural := 0;
width_codeword:natural := 8;
width_dataword:natural := 8;
lpm_hint:string := "UNUSED";
lpm_type:string := "altecc_decoder");
port(
aclr:in std_logic := '0';
clock:in std_logic := '0';
clocken:in std_logic := '1';
data:in std_logic_vector(width_codeword-1 downto 0);
err_corrected	:	out std_logic;
err_detected	:	out std_logic;
q:out std_logic_vector(width_dataword-1 downto 0);
syn_e	:	out std_logic);
end component;

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