Intel FPGA Integer Arithmetic IP Cores User Guide

ID 683490
Date 10/05/2020
Document Table of Contents
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3.1. Features

The LPM_DIVIDE IP core offers the following features:

  • Generates a divider that divides a numerator input value by a denominator input value to produce a quotient and a remainder.
  • Supports data width of 1–256 bits.
  • Supports signed and unsigned data representation format for both the numerator and denominator values.
  • Supports area or speed optimization.
  • Provides an option to specify a positive remainder output.
  • Supports pipelining configurable output latency.
  • Supports optional asynchronous clear and clock enable ports.