Intel FPGA Integer Arithmetic IP Cores User Guide

Download
ID 683490
Date 10/05/2020
Public
Document Table of Contents

12.6. VHDL Component Declaration

The VHDL component declaration is located in the VHDL Design File (.vhd) altera_mf_components.vhd in the < Intel® Quartus® Prime installation directory>\libraries\vhdl\altera_mf directory.

component altmult_complex
generic (
intended_device_family:string := "unused";
implementation_style:string := "AUTO";
pipeline:natural := 4;
representation_a:string := "SIGNED";
representation_b:string := "SIGNED";
width_a:natural;
width_b:natural;
width_result:natural;
lpm_hint:string := "UNUSED";
lpm_type:string := "altmult_complex");
port(
aclr:in std_logic := '0';
clock:in std_logic := '0';
complex:in std_logic := '1';
dataa_imag:in std_logic_vector(width_a-1 downto 0);
dataa_real:in std_logic_vector(width_a-1 downto 0);
datab_imag:in std_logic_vector(width_b-1 downto 0);
datab_real:in std_logic_vector(width_b-1 downto 0);
ena:in std_logic := '1';
result_imag:out std_logic_vector(width_result-1 downto 0);
result_real:out std_logic_vector(width_result-1 downto 0));
end component;

Did you find the information on this page useful?

Characters remaining:

Feedback Message