E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/30/2022
Public
Document Table of Contents

2.12.6.1. TX Statistics Registers

Table 74.  Transmit Side Statistics Registers

Address

Name-

Description

Access

0x800

TX_FRAGMENTS_31_0

Number of transmitted frames less than 64 bytes and reporting a CRC error (lower 32 bits)

RO

0x801

TX_FRAGMENTS_63_32

Number of transmitted frames less than 64 bytes and reporting a CRC error (upper 32 bits)

RO

0x802

TX_JABBERS_31_0

Number of transmitted oversized frames reporting a CRC error (lower 32 bits)

RO

0x803

TX_JABBERS_63_32

Number of transmitted oversized frames reporting a CRC error (upper 32 bits)

RO

0x804

TX_FCSERR_31_0

Number of transmitted packets with FCS errors. (lower 32 bits)

RO

0x805

TX_FCSERR_63_32

Number of transmitted packets with FCS errors. (upper 32 bits)

RO

0x806

TX_CRCERR_OKPKT_31_0

Number of frames of any size that are malformed but are neither undersized or oversized with a CRC error (lower 32 bits)

RO

0x807

TX_CRCERR_OKPKT_63_32

Number of frames of any size that are malformed but are neither undersized or oversized with a CRC error (upper 32 bits)

RO

0x808

TX_MCAST_DATA_ERR_31_0

Number of errored multicast frames transmitted, excluding control frames (lower 32 bits)

RO

0x809

TX_MCAST_DATA_ERR_63_32

Number of errored multicast frames transmitted, excluding control frames (upper 32 bits)

RO

0x80A

TX_BCAST_DATA_ERR_31_0

Number of errored broadcast frames transmitted, excluding control frames (lower 32 bits)

RO

0x80B

TX_BCAST_DATA_ERR_63_32

Number of errored broadcast frames transmitted, excluding control frames (upper 32 bits)

RO

0x80C

TX_UCAST_DATA_ERR_31_0

Number of errored unicast frames transmitted, excluding control frames (lower 32 bits)

RO

0x80D

TX_UCAST_DATA_ERR_63_32

Number of errored unicast frames transmitted, excluding control frames (upper 32 bits)

RO

0x80E

TX_MCAST_CTRL_ERR_31_0

Number of errored multicast control frames transmitted (lower 32 bits)

RO

0x80F

TX_MCAST_CTRL_ERR_63_32

Number of errored multicast control frames transmitted (upper 32 bits)

RO

0x810

TX_BCAST_CTRL_ERR_31_0

Number of errored broadcast control frames transmitted (lower 32 bits)

RO

0x811

TX_BCAST_CTRL_ERR_63_32

Number of errored broadcast control frames transmitted (upper 32 bits)

RO

0x812

TX_UCAST_CTRL_ERR_31_0

Number of errored unicast control frames transmitted (lower 32 bits)

RO

0x813

TX_UCAST_CTRL_ERR_63_32

Number of errored unicast control frames transmitted (upper 32 bits)

RO

0x814

TX_PAUSE_ERR_31_0

Number of errored pause frames transmitted (lower 32 bits)

RO

0x815

TX_PAUSE_ERR_63_32

Number of errored pause frames transmitted (upper 32 bits)

RO

0x816

TX_64B_31_0

Number of 64-byte transmitted frames (lower 32 bits), including the CRC field but excluding the preamble and SFD bytes

RO

0x817

TX_64B_63_32

Number of 64-byte transmitted frames (upper 32 bits), including the CRC field but excluding the preamble and SFD bytes

RO

0x818

TX_65to127B_31_0

Number of transmitted frames between 65–127 bytes (lower 32 bits)

RO

0x819

TX_65to127B_63_32

Number of transmitted frames between 65–127 bytes (upper 32 bits)

RO

0x81A

TX_128to255B_31_0

Number of transmitted frames between 128–255 bytes (lower 32 bits)

RO

0x81B

TX_128to255B_63_32

Number of transmitted frames between 128–255 bytes (upper 32 bits)

RO

0x81C

TX_256to511B_31_0

Number of transmitted frames between 256–511 bytes (lower 32 bits)

RO

0x81D

TX_256to511B_63_32

Number of transmitted frames between 256–511 bytes (upper 32 bits)

RO

0x81E

TX_512to1023B_31_0

Number of transmitted frames between 512–1023 bytes (lower 32 bits)

RO

0x81F

TX_512to1023B_63_32

Number of transmitted frames between 512–1023 bytes (upper 32 bits)

RO

0x820

TX_1024to1518B_31_0

Number of transmitted frames between 1024–1518 bytes (lower 32 bits)

RO

0x821

TX_1024to1518B_63_32

Number of transmitted frames between 1024–1518 bytes (upper 32 bits)

RO

0x822

TX_1519toMAXB_31_0

Number of transmitted frames of size between 1519 bytes and the number of bytes specified in the MAX_TX_SIZE_CONFIG register (lower 32 bits)

RO

0x823

TX_1519toMAXB_63_32

Number of transmitted frames of size between 1519 bytes and the number of bytes specified in the MAX_TX_SIZE_CONFIG register (upper 32 bits)

RO

0x824

TX_OVERSIZE_31_0

Number of oversized frames (frames with more bytes than the number specified in the MAX_TX_SIZE_CONFIG register) transmitted (lower 32 bits)

RO

0x825

TX_OVERSIZE_63_32

Number of oversized frames (frames with more bytes than the number specified in the MAX_TX_SIZE_CONFIG register) transmitted (upper 32 bits)

RO

0x826

TX_MCAST_DATA_OK_31_0

Number of valid multicast frames transmitted, excluding control frames (lower 32 bits)

RO

0x827

TX_MCAST_DATA_OK_63_32

Number of valid multicast frames transmitted, excluding control frames (upper 32 bits)

RO

0x828

TX_BCAST_DATA_OK_31_0

Number of valid broadcast frames transmitted, excluding control frames (lower 32 bits)

RO

0x829

TX_BCAST_DATA_OK_63_32

Number of valid broadcast frames transmitted, excluding control frames (upper 32 bits)

RO

0x82A

TX_UCAST_DATA_OK_31_0

Number of valid unicast frames transmitted, excluding control frames (lower 32 bits)

RO

0x82B

TX_UCAST_DATA_OK_63_32

Number of valid unicast frames transmitted, excluding control frames (upper 32 bits)

RO

0x82C

TX_MCAST_CTRL_OK_31_0

Number of valid multicast frames transmitted, excluding data frames (lower 32 bits)

RO

0x82D

TX_MCAST_CTRL_OK_63_32

Number of valid multicast frames transmitted, excluding data frames (upper 32 bits)

RO

0x82E

TX_BCAST_CTRL_OK_31_0

Number of valid broadcast frames transmitted, excluding data frames (lower 32 bits)

RO

0x82F

TX_BCAST_CTRL_OK_63_32

Number of valid broadcast frames transmitted, excluding data frames (upper 32 bits)

RO

0x830

TX_UCAST_CTRL_OK_31_0

Number of valid unicast frames transmitted, excluding data frames (lower 32 bits)

RO

0x831

TX_UCAST_CTRL_OK_63_32

Number of valid unicast frames transmitted, excluding data frames (upper 32 bits)

RO

0x832

TX_PAUSE_31_0

Number of valid pause frames transmitted (lower 32 bits)

RO

0x833

TX_PAUSE_63_32

Number of valid pause frames transmitted (upper 32 bits)

RO

0x834

TX_RNT_31_0

Number of transmitted runt packets (lower 32 bits). The IP core does not transmit frames of length less than nine bytes. The IP core pads frames of length nine bytes to 64 bytes to extend them to 64 bytes. Therefore, this counter does not increment in normal operating conditions.

RO

0x835

TX_RNT_63_32

Number of transmitted runt packets (upper 32 bits). The IP core does not transmit frames of length less than nine bytes. The IP core pads frames of length nine bytes to 64 bytes to extend them to 64 bytes. Therefore, this counter does not increment in normal operating conditions.

RO

0x836 TX_st_31_0

Number of TX frame starts (lower 32 bits)

RO

0x837

TX_st_63_32

Number of TX frame starts (upper 32 bits)

RO

0x838

TX_lenerr_31_0

Number of frames where the length of the frame advertised in the L/T field was larger than the frame that was received (lower 32 bits).

Length checking must be enabled

RO

0x839

TX_lenerr_63_32

Number of frames where the length of the frame advertised in the L/T field was larger than the frame that was received (upper 32 bits).

Length checking must be enabled

RO

0x83A

TX_pfc_err_31_0

Number of malformed TX PFC frames with CRC errors (lower 32 bits)

RO

0x83B

TX_pfc_err_63_32

Number of malformed TX PFC frames with CRC errors (upper 32 bits)

RO

0x83C

TX_pfc_31_0

Number of TX PFC frames without error (lower 32 bits)

RO

0x83D

TX_pfc_63_32

Number of TX PFC frames without error (upper 32 bits)

RO

0x840

txstat_revid

Returns a 4 byte value indicating the revision of this design

RO

0x841

txstat_scratch

32 bits of scratch register space for testing

RO

0x842 to 0x844 Reserved
0x845

TX_CNTR_CONFIG

Bits[2:0]: Configuration of TX statistics counters:
  • Bit[2] = 1: Freeze stats CSRs so that all TX Stats values read from the registers are from the same moment:
    • Note that the actual stats collection counters are not frozen, but because they are all 'read' at the time of the freeze, they are cleared.
    • If a shadow request is started while snapshot is active, a new capture is executed.
    • Likewise, if a shadow request is active while snapshot is asserted, a new capture is executed.
    • While either a shadow request or a capture is active, tx_shadow_on is high.
    • Snapshot and shadow requests apply to several of the RX PCS counters as well as MAC statistics.
  • Bit[1] = 1: Reset the parity error bit in cntr_TX_status.
    • Parity error bit remains in reset until rst_tx_parity is set back to 0

  • Bit[0] = 1: Reset all TX Stats counters
    • TX stats stays in reset until reset is set back to 0.
    • Reset also applies when snapshot or shadow is active, and clears the AVMM visible registers.
    • rst_tx_stats does not clear the parity error bit.
Bits[31:3] are Reserved.
RW
0x846 TX_CNTR_STATUS
  • Bit[1] =1: The CSRs for the TX Statistics are currently frozen, and holding the statistic values from the last time a shadow request was made.

    Shadow on is asserted for either a shadow request or a snapshot

  • Bit[0] = 1: A parity error was detected on at least one of the statistics counters since the last time this bit was cleared
    • Statistics counter values are stored periodically by EHIP for long term storage.
    • Whenever a counter value is stored, a parity value is calculated for the new value.
    • Whenever a stats value is updated, the parity value of the old value is calculated. If it doesn't match the stored value, the sticky parity error bit is asserted.
    • If tx_parity_err is high, it means sometime in the past, a parity error was detected on the stats memory.
Bits[31:2] are Reserved.
RO
0x847–0x85F

Reserved

0x860 TX_Payload_OctetsOK_31_0 Number of transmitted payload bytes in frames with no FCS, undersized, oversized, or payload length errors.
  • When TX VLAN/SVLAN detection is enabled, VLAN/SVLAN header bytes are also removed from the count
  • For single lane EHIP modules (10G or 25G), packets that start within 4 bytes of a the previous packet's TERM are not counted (malformed).
RO
0x861 TX_Payload_OctetsOK_63_32 RO
0x862 TX_Frame_OctetsOK_31_0 Number of transmitted bytes in frames with no FCS, undersized, oversized, or payload length errors.

For single lane EHIP modules (10G or 25G), packets that start within 4 bytes of a the previous packet's TERM are not counted (malformed).

RO
0x863 TX_Frame_OctetsOK_63_32 RO
0x864 TX_Malformed_CTRL_31_0
Records the number of TX packets that were malformed.
  • A packet is malformed if it is interrupted by an MII Control byte other than TERM and ERROR
  • Packets that have ERROR control bytes but end with a TERM are not considered malformed
  • For single lane EHIP modules (10G or 25G), packets that start within 4 bytes of a the previous packet's TERM are not counted (malformed).
RO
0x865 TX_Malformed_CTRL_63_32 RO
0x866 TX_Dropped_CTRL_31_0 Records the number of TX packets dropped due to errors.
  • The TXMAC automatically pads short frames, except when i_skip_crc is asserted from the packet
  • When CRC is skipped, if the packet is shorter than 21 bytes, it is counted as a TX dropped packet
RO
0x867 TX_Dropped_CTRL_63_32 RO
0x868 TX_BadLt_CTRL_31_0 Records the number of TX frames that arrived with a Length/Type field that is neither a length nor a type.
  • L/T is considered to be a Length field if the value in the field is 16'd1500 or less
  • L/T is considered to be a Type field if the value in the field is 16'd1536 or more
  • If a packet has a L/T field with value between 16'd1501 and 16'd1535 (inclusive), the L/T field is considered bad, and the counter is incremented
Note: If TX_VLAN/SVLAN detection is turned on, it is the L/T field inside the VLAN/SVLAN header that is evaluated.
RO
0x869 TX_BadLt_CTRL_63_32 RO

Did you find the information on this page useful?

Characters remaining:

Feedback Message