Visible to Intel only — GUID: cus1530280893382
Ixiasoft
Visible to Intel only — GUID: cus1530280893382
Ixiasoft
2.12.3.7. EHIP TX MAC Feature Configuration
Offset: 0x40B
EHIP TX MAC Feature Configuration Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:15 | am_period | TX Alignment Marker Period
Sets the number of TX clock cycles that are used to send regular data between Alignment Markers
|
RW | 0x13FFB |
9 | txcrc_covers_preamble | Enable CRC over preamble 0: TX CRC calculated over Ethernet Frame (default)
1: TX CRC calculated over frame plus preamble
|
RW | 0x0 |
8:6 | flowreg_rate | Sets the valid toggle rate of the TX MAC flow regulator 0: 100G 1: Reserved 2: Reserved 3:25G or 10G (without PTP) 4:10G (with PTP or when External AIB clocking is enabled) 5: Reserved 6: Reserved 7: Use custom cadence |
RW | 0x0 |
5:3 | am_width | Sets the number of cycles for each AM pulse
Sets the number of TX clock cycle that the AM pulse is held high
|
RW | 0x5 |
2:1 | ipg | DIC Average Min IPG
Sets the average minimum IPG enforced by the Deficit Idle Counter:
|
RW | 0x0 |
0 | en_pp | Enable TX Preamble Passthrough 1: Preamble-passthrough mode enabled - bytes 1 to 7 of each SOP word can be used as preamble bytes at the start of the Ethernet packet 0: A standard Ethernet preamble can be used for TX packets |
RW | 0x0 |
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