3. About the E-Tile CPRI PHY Intel® FPGA IP
The E-Tile CPRI PHY Intel FPGA IP implements the physical layer (layer 1) specification based on the Common Public Radio Interface (CPRI) v7.0 Specification (2015-10-09) in Intel® Stratix® 10 and Intel® Agilex™ E-tile FPGA production devices. The IP supports up to 23 CPRI channels and the CPRI line rates of 2.4376, 3.0720, 4.9152, 6.1440, 9.8304 Gbps. This IP also supports 10.1376, 12.1651 and 24.33024 Gbps CPRI line rate with and without Reed-Solomon Forward Error Correction (RS-FEC).
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