E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/30/2022

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Document Table of Contents OTN Mode

The E-Tile Hard IP for Ethernet Intel FPGA IP supports OTN mode in 10/25G and 100G variants with optional RSFEC feature. It can support up to four OTN channels in 10/25G variant. This mode bypassed the Ethernet MAC and uses PCS66 interface to read and write to the PMA block.

The OTN TX datapath consists of:
  • Alignment insertion—the TX PCS interface inserts alignment markers.
  • Striper—enables logically sequential data to be segmented to increase data throughput.
Note: In OTN mode, scrambler is bypassed because the input data is expected to be scrambled.

The OTN RX datapath consists of an aligner block that enables the alignment of the incoming data.