AN 763: Intel® Arria® 10 SoC Device Design Guidelines

ID 683192
Date 5/17/2022
Document Table of Contents Consider Desired HPS Boot Clock Frequency

The Intel® Arria® 10 SoC device supports a default boot clock mode of 10-50 MHz as well as faster boot clock modes.

To use faster boot clock frequencies, you can change the CSEL fuses from their default setting of 0x0 to any value between 0x7 and 0xE. These settings allow boot ROM code to configure the HPS PLL to run faster frequencies, depending on the speed of the external oscillator.

For more information, refer to the Clock Select chapter of the "Booting and Configuration" appendix in the Intel® Arria® 10 Hard Processor System Technical Reference Manual.

GUIDELINE: If the faster boot clock frequencies enabled with CSEL value 0x7 to 0xE are desired, then the HPS requires the VCCL_HPS voltage to be at least 0.95V to prevent boot failures or system instability issues.

The FPGA supply Vcc may be 0.9V if desired (to reduce device power consumption) as long as separate power rails are used for HPS VCCL_HPS and FPGA supplies.

For default boot mode where the CSEL fuses are set to 0x0, the VCCL_HPS voltage can be 0.9V.