13.1.8. Shared Memory (SharedMem)
The length of the Initial Data parameter, 1-D array, determines the size of the memory. You can optionally initialize the generated HDL with this data.
|Memory-Mapped Address||Specifies the address of the memory block. Must evaluate to an integer address.|
|Enable bit slicing||
Turn on to allow multiple SharedMem blocks to occupy the same address range and each to take a slice of the data bus. When you turn on this parameter, enter the most and least significant bits of the bus that this SharedMem block connects to in the MSB and LSB parameters. When using this feature, some restrictions apply to the SharedMem block:
|Read/Write Mode||Specifies the mode of the memory as viewed from the processor:
|Initial Data||Specifies the initialization data. The size of the 1-D array determines the memory size.|
|Initialize Hardware Memory Blocks with Initial Data Contents||Turn on to initialize the memory with the specified initial data values. Turn off to use only the size of the initial data for the size of memory. The Uninitialized means parameter on the Control Block Optimization tab determines the size.|
|Description||Text describing the memory block. The description is propagated to the generated memory map.|
|Memory Output Type||Specifies the data type that the memory block stores.|
|Memory Output Scale||Specifies the scale factor to apply to the data stored in the memory block.|
|Sample Time||Specifies the Simulink sample time.|
|wd||Input||Any fixed-point type||Write data.|
|rd||Output||Any fixed-point type||Read data.|
Intel Hyperflex Architecture Support for SharedMem Block
Intel Hyperflex architectures do not support all modes of memory operation and some modes are performance limited. For more information, refer to the Intel Agilex Embedded Memory User Guide or the Intel Stratix 10 Embedded Memory User Guide.
In designs on Intel Hyperflex architectures, Intel recommends you use a SharedMem block for one-way communication between internal and external Avalon-MM interfaces. Do not select Read/Write for Read/Write Mode; only use Read or Write for Read/Write Mode not both read and write. On the internal side, either do not connect the rd interface or drive we to constant zero. Do not both dynamically drive we and use the rd output. Only use the SharedMem block in your design for one-way communication.
DSP Builder may duplicate your memory to provide support for up to one write with two reads on Intel Hyperflex architectures. Reads on the bus and system side are from separate copies of the memory and any writes are applied to both copies. DSP Builder offers SharedMem support in true dual port memory configurations depending on the constraints of the Intel Hyperflex architecture M20K block. SharedMem blocks have no support for dual clocks (bus clock must run at system rate) and no support for mixed widths (SharedMem data width must match bus width).