DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 3/23/2022
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14.3.17. Pulse Divider (PulseDivider)

The PulseDivider block generates a single-cycle one on its output for each 2^N ones on its input.
Table 126.  Parameters for the PulseDivider Block
Parameter Description
N Specifies the input block size 2^N.
Table 127.  Port Interface for the PulseDivider Block
Signal Direction Type Description
v Input Boolean or uint(1). Data valid.
g Output uint(1). Block containing 2^N elements received.