DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 3/23/2022
Public

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14.4.6. AddSubFused

The AddSubFused block produces both the sum and the difference of the IEEE floating-point signals that arrive on the input ports.
Table 153.  Port Interface for the AddSubFused Block
Signal Direction Type Description Vector Complex
  Input Single or double Operand 1 Yes Yes
b Input Single or double Operand 2 Yes Yes
+ Output Single or double Result 1 Yes Yes
Output Single or double Result 2 Yes Yes