DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 3/23/2022

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Document Table of Contents Adder Trees and Scalar Products

The matmul_flash_RS and matmul_flash_RD design examples use vector signals with floating-point components.

The gemm_flash design example is a generalized matrix multiplication design that uses the Scalar Product block to calculate an inner product. The adder tree and the Scalar Product block have similar parameters:

  • Fused datapath. Enable this option to reduce logic utilization at the expense of IEEE compliance
  • Rounding modes:
    1. Nearest
    2. Down (towards negative infinity)
    3. Up (towards positive infinity)
    4. Towards zero

When you turn on Fused datapath, you can select only the rounding modes Nearest and Towards zero. Logic utilization is highest when your design uses rounding mode Nearest.

Figure 89. Floating-Point Rounding

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