DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 3/23/2022
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14.3.14. Hybrid FFT (Hybrid_FFT, HybridVFFT)

The Hybrid_FFT block implements a hybrid serial or parallel implementation of a supersampled FFT (or IFFT) that processes 2M points per cycle (with 0 < M).

The hybrid implementation consists of an optional serial section (built using single-wire streaming FFTs) associated twiddle block, and a parallel section (implemented using the PFFT_Pipe block).

You control the length of the serial section by a user-supplied parameter. For an FFT with 2N points that processes 2M points per cycle, this parameter must be no greater than N–M.

In general, the serial section is more space-efficient; the parallel section is more multiplier-efficient. So changing the value of this parameter provides a trade-off between DSP usage and memory usage.

The HybridVFFT serial section absorbs all the variability and the size of the parallel section is fixed. The variable-size hybrid FFT includes multiple variable-size streaming FFTs, a variable-size GeneralTwiddle and a parallel FFT.

Table 120.  Parameters for the Hybrid_FFT and HybridVFFT Blocks
Parameter Description
iFFT true to implement an IFFT, otherwise false.
maxsize The maximum FFT size is 2^maxsize.HybridVFFT only.
minsize The minimum FFT size is 2^minsize and is limited by the value of sbits M. It cannot be smaller than 2^sbits (2^M). HybridVFFT only.
N Log2 of the number of points in the FFT.
Bit-reversed input true if you expect bit-reversed input, otherwise false.
M Log2 of the number of input wires.
Number of serial stages Length of the serial section (in radix-2 stages).
Twiddle/pruning specification( -
Optimize twiddle memory usage true to use GeneralMultTwidle (rather than GeneralTwiddle) for top-level twiddle.
Use faithful rounding true if the block uses faithful (rather than correct) rounding for floating-point operations. Fixed-point FFTs ignore this parameter.
Table 121.  Port Interface for the Hybrid_FFT and HybridVFFT Blocks
Signal Direction Type Description
v Input Boolean. Valid input signal.
d Input As specified. Complex data input signal.
qv Output Boolean. Valid output signal.
q Output Determined by pruning specification. Complex data output signal.
size Input Unsigned integer FFT serial section size, which must be at least equal to the difference between maxsize and minsize.
Type style Elements used
Bold b
Italic i
Underlined u