DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 3/23/2022
Public

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6.12.24. Uniform Random Number Generator

This DSP Builder design example demonstrates a random number generator (Tausworthe-88) that produces uniformly distributed random numbers.

You can specify the seed value for the random sequence using the seed_value input. The reset input resets the sequence to the initial state defined by the seed_value. The output is a 32-bit random number, which can be interpreted as a random integer sampled from the uniform distribution.