AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents USB Interface Design Guidelines

The Intel Agilex® 7 HPS can connect its embedded USB MACs directly to industry-standard USB 2.0 ULPI PHYs using the 1.8 V dedicated HPS I/O. No FPGA routing resources are used and timing is fixed, which simplifies design.

For more information about the design considerations for USB, refer to the Intel Agilex® 7 Hard Processor System Technical Reference Manual.