AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents Optional Configuration Pins

Table 64.  Optional Configuration Pins Checklist
Number Done? Checklist Item
1   Plan the board design to support optional configuration pins as required.

You can enable the following optional configuration pins:

  • OSC_CLK_1—Must be connected to a 25 MHz, 100 MHz, or 125 MHz source if used.
  • Direct to Factory Image
Note: Intel Agilex® 7 devices use OSC_CLK_1 pin as the reference clock for transceiver calibration. You must provide a stable and free running clock input at this pin. For more guidance on configuration pins, refer to the Intel Agilex® 7 Device Family Pin Connection Guidelines.


The Catastrophic Trip (nCATTRIP) is an optional signal assignable to any unused SDM_IO pin. When enabled, the nCATTRIP signal asserts when core temperature is greater than 125° C.

Attention: When nCATTRIP asserts, you must immediately power down the FPGA to avoid permanent damage to the device.
To enable the nCATTRIP output, select "USE nCATTRIP output" in the Configuration PIN GUI and assign the appropriate SDM I/O from the pulldown menu.
Figure 13.  nCATTRIP Configuration Pin

For more information about nCATTRIP and other optional configuration pins, refer to the Secure Device Manager (SDM) Optional Signal Pins section in Intel Agilex® 7 Device Family Pin Connection Guidelines and the Intel Agilex® 7 Power Management User Guide.

GUIDELINE: Ensure that you follow the pull-up recommendations for the nCATTRIP signal to avoid incorrect sampling before you configure your device.

Table 65.  Pull-Up Recommendations
nCATTRIP SDM_IO Assignment Options Internal Pull-Up or Pull-Down External Pull-Up Recommendation
1-7, 9-15 20kΩ pull-up Not required
0, 8, 16 20kΩ pull-down Connect 4.7kΩ to VCCIO_SDM