Simulation allows you to verify the design behavior before configuring the FPGA device with the verified design. You can specify input vectors to your simulator and then the simulator determines and reports the expected corresponding outputs during the time period you specify.
The Intel® FPGA simulation process involves setting up your supported simulator working environment, compiling simulation model libraries, generating simulation files, running your simulator, and interpreting the results.
The Intel® Quartus® Prime software does not include a native simulator, but provides support for the specific RTL- and gate-level EDA simulators.
For more information and supported simulators, please refer to Intel® Quartus® Prime Pro Edition User Guide - Third-party Simulation.
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