AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents

5.3.8. Simulation

A functional, non-cycle-accurate simulation of the NoC IP can be performed to verify the connections and address mapping specified for your design. As indicated in Instantiating NoC IP, the HDL netlist containing the NoC IP does not contain connections between initiator and target bridges. After creating assignments to describe your design connectivity and address mapping, a simulation include file is generated to provide this information to your simulation environment. This file includes instructions on how to include it in your top-level testbench.