AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents

3.2. PLLs and Clock Routing

Table 13.  PLLs and Clock Routing Checklist
Number Done? Checklist Item
1   Verify the number of PLLs and clock resources.

Verify that your chosen device density package combination includes enough PLLs and clock routing resources for your design.