AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents

5.3.7. Compilation

After completing and saving location assignments, proceed with compilation as with non-NoC designs. The Fitter section of the compilation report contains two additional reports for NoC designs. Use the NoC Connectivity Report to verify that the hard memory NoC connections and address mapping have been correctly implemented in your design. The NoC Performance Report contains similar reporting as the one in the Interface Planner tool, but with revised estimates based on actual achieved clock frequencies.