AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents

7.5. Area and Timing Optimization

Table 91.  Area and Timing Optimization Checklist
Number Done? Checklist Item
1   Run Fitter (Plan) if you want timing estimates before running a full compilation.
2   Use Intel® Quartus® Prime optimization features to achieve timing closure or improve the resource utilization.

This section highlights some of the features offered in the Intel® Quartus® Prime software to help optimize area (or resource utilization) and timing performance. If the timing analysis reports that your design requirements were not met, you must make changes to your design or settings and recompile the design to achieve timing closure. If your compilation results in no-fit messages, you must make changes to get successful placement and routing.

You can run Fitter (Plan) to estimate your design’s timing results before the software performs full placement and routing. Click Processing > Start > Start Fitter (Plan) to generate initial compilation results after you have run analysis and synthesis.

Physical synthesis optimizations make placement-specific changes to the netlist that improve results for a specific Intel device. You can optimize for performance by selecting High Performance Effort or Superior Performance Optimization Mode in the Compiler Settings. These optimization modes turn on the Advanced Physical Synthesis option under the Advanced Fitter Settings. If you turn on these options, ensure that they do improve the results for your design. If you do not require these options to meet your design timing requirements, turn off the options to reduce the compilation time.

The Design Space Explorer II (DSE II) is a utility that automates the process to find optimal project settings for resource, performance, or power optimization goals. DSE II attempts multiple seeds to identify one that meets your requirements. The Exploration Panel > Exploration mode allows you a predefine exploration space to target design performance, area of improvements, or power reduction with multiple compilations.

For more information about the topics listed below, refer to the various sections listed below in the Intel® Quartus® Prime Pro Edition User Guide: Design Optimization.
Table 92.  
Chapter Optimization Areas
1 Design Space Explorer II
3 Netlist Optimizations and Physical Synthesis
4 Area Optimization
5 Timing Closure and Optimization
1 and 5 Power Optimization