AN 886: Intel Agilex® 7 Device Design Guidelines

ID 683634
Date 10/09/2023
Document Table of Contents

5.3. Design Entry for NoC

Intel Agilex® 7 M-Series FPGAs contain an integrated Network-on-Chip (NoC) to facilitate high-bandwidth data movement between FPGA core logic and memory resources such as high-bandwidth memory and external memory interfaces. In addition to the guidelines for SoC and FPGA-only devices, designing for NoC-enabled devices involves additional considerations. This section provides basic guidelines for NoC devices. For more information, refer to the Intel Agilex® 7 M-Series FPGA Network-on-Chip (NoC) User Guide.