Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 9/30/2022
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Chroma Key Intel® FPGA IP 11. Chroma Resampler Intel® FPGA IP 12. Clipper Intel® FPGA IP 13. Clocked Video Input Intel® FPGA IP 14. Clocked Video to Full-Raster Converter Intel® FPGA IP 15. Clocked Video Output Intel® FPGA IP 16. Color Space Converter Intel® FPGA IP 17. Deinterlacer Intel® FPGA IP 18. FIR Filter Intel® FPGA IP 19. Frame Cleaner Intel® FPGA IP 20. Full-Raster to Clocked Video Converter Intel® FPGA IP 21. Full-Raster to Streaming Converter Intel® FPGA IP 22. Generic Crosspoint Intel® FPGA IP 23. Genlock Signal Router Intel® FPGA IP 24. Guard Bands Intel® FPGA IP 25. Interlacer Intel® FPGA IP 26. Mixer Intel® FPGA IP 27. Pixels in Parallel Converter Intel® FPGA IP 28. Scaler Intel® FPGA IP 29. Stream Cleaner Intel® FPGA IP 30. Switch Intel® FPGA IP 31. Tone Mapping Operator Intel® FPGA IP 32. Test Pattern Generator Intel® FPGA IP 33. Video Frame Buffer Intel® FPGA IP 34. Video Streaming FIFO Intel® FPGA IP 35. Video Timing Generator Intel® FPGA IP 36. Warp Intel® FPGA IP 37. Design Security 38. Document Revision History for Video and Vision Processing Suite User Guide

11.4. Chroma Resampler IP Registers

Each register is either read-only (RO) or read-write (RW).
Table 96.   Parameterization registers In the software API the register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_CRS as appropriate and with an optional REG suffix
Address Register Access Description
0x0000 VID_PID RO

Read this register to retrieve chroma resampler product ID.

This register always returns 6AF7_022E

0x0004 VERSION RO

Read this register to retrieve the version information for the Intel Quartus release that Intel uses to build the chroma resampler.

0x0008 LITE_MODE RO Read this register to determine if lite mode is on. This register returns 0 when you turn off lite and 1 when you turn on lite.
0x000C DEBUG_ENABLED RO Read this register to determine if debug features is on. This register returns 1 if reads to other registers designated as RW return the last value the IP writes to the register, or an undefined value.
0x0010 ENABLE_444 RO Read this register to determine if 4:4:4 chroma sampling is supported at the output.
0x0014 ENABLE_422 RO Read this register to determine if 4:2:2 chroma sampling is supported at the output.
0x0018 ENABLE_420 RO Read this register to determine if 4:2:0 chroma sampling is supported at the output.
0x0060 to 0x011F - - Unused.
Table 97.   Control and debug registers For more information, refer to Control Packets. You must turn on debug features to read the values stored in these registers. If you turn off debug features, reads to these registers return undefined data. The only exception is the STATUS register, the value of which you can always read
Address Register Access Description
Lite Full
0x0120 IMG_INFO_WIDTH RW RO

When you turn on lite, use this register to set the expected width of incoming video fields.

When you turn off lite and turn on Debug features, this register returns the width that the chroma resampler derives from information in the image information packet.

0x0124 IMG_INFO_HEIGHT RW RO

When you turn on lite, use this register to set the expected height of incoming video fields.

When you turn off lite and turn on Debug features, this register returns the height that the chroma resampler derives from information in the image information packet.

0x0128 IMG_INFO_INTERLACE - RO When you turn off lite and turn on Debug features, this register returns the interlace nibble that the chroma resampler derives from information in the image information packet.
0x012C Reserved - - Reserved
0x0130 IMG_INFO_COLORSPACE - RO When you turn off lite and turn on Debug features, this register returns the color space that the chroma resampler derives from information in the image information packet.
0x0134 IMG_INFO_SUBSAMPLING RW RO

When you turn on lite, use this register to set the expected chroma sampling of incoming video fields.

When you turn off lite and turn on Debug features, this register returns the subsampling that the chroma resampler derives from information in the image information packet.

0x0138 IMG_INFO_COSITING - RO When you turn off lite and turn on Debug features, this register returns the cositing that the chroma resampler derives from information in the image information packet.
0x013C IMG_INFO_FIELD_COUNT - RO When you turn off lite and turn on Debug features, this register returns the field count that the chroma resampler derives from information in the image information packet.
0x012C to 0x013C - - - Unused.
0x0140 STATUS RO

Bit 0 : Status bit.

1 means chroma resampler is processing a video field, 0 otherwise.

When you turn off Lite mode:

Bit 1 : Pending register updates bit.

Any writes to the output sampling register (0x0148) cause the IP to raise the pending register updates bit, to indicate outstanding changes to the resampling settings.

The IP lowers this bit at the next field boundary after a write to the COMMIT register.

0x0144 COMMIT RW Only when you turn off lite mode. The IP holds any changes to the scaling settings (not coefficients) via the register map until you issue a write to this register. The value you write is unimportant.
0x0148 OUTPUT_MODE RW Write to this register to set the output chroma sampling. Write 0 for 4:2:0, 2 for 4:2:2 and 3 for 4:4:4

Register Bit Descriptions

Table 98.  VID_PID
Name Bits Description
Chroma resampler vendor ID and product ID 31:0 This register always returns 0x6AF7_022E.
  • 15:0 is the product ID and always returns 0x022E
  • 31:16 is the vendor ID and always returns 0x6AF7
Table 99.  VERSION
Name Bits Description
Lite mode parameterization bit 7:0 Register map version. Returns 0x01.
QPDS patch revision 15:8 Returns 0x00.
QPDS update revision 23:16 Updated for each release. For 21.4, returns 0x04.
QPDS major revision 31:24 Updated for each release. For 21.4, returns 0x15.
Table 100.   LITE_MODE
Name Bits Description
Lite mode parameterization bit 31:0 Returns 1 if you turn on lite mode and 0 otherwise.
Table 101.  DEBUG_ENABLED
Name Bits Description
Debug features parameterization bit 31:0 Returns 1 if you turn on debug features and 0 otherwise.
Table 102.  ENABLE_444
Name Bits Description
Enable_444_out 31:0 Returns 1 if 4:4:4 chroma sampling is supported at the output.
Table 103.  ENABLE_422
Name Bits Description
Enable_422_out 31:0 Returns 1 if 4:2:2 chroma sampling is supported at the output.
Table 104.  ENABLE_420
Name Bits Description
Enable_420_out 31:0 Returns 1 if 4:2:0 chroma sampling is supported at the output.
Table 105.   IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0

When you turn on lite, write to this register to set the expected width of the incoming video fields.

When you turn off lite and turn on Debug features, this register returns the width-1 field from the most recently received image information packet and adds 1 to return a value for width.

unused 31:16 Unused.
Table 106.   IMG_INFO_HEIGHT
Name Bits Description
Height bits 15:0

When you turn on lite, write to this register to set the expected height of the incoming video fields.

When you turn off lite and turn on Debug features, this register reads the height-1 field from the most recently received image information packet and adds 1 to return a value for height.

unused 31:16 Unused.
Table 107.  IMG_INFO_INTERLACE
Name Bits Description
IntlaceNibble bits 3:0

When you turn on lite, this register has no function.

When you turn off lite and turn on Debug features, this register returns the intlaceNibble field from the most recently received image information packet .

unused 31:4 Unused.
Table 108.   IMG_INFO_COLORSPACE
Name Bits Description
CSP code bits 6:0

When you turn on lite, this register has no function.

When you turn off lite and turn on Debug features, this register returns the 7 bit CSP field from the most recently received image information packet .

unused 31:7 Unused.
Table 109.  IMG_INFO_SUBSAMPLING
Name Bits Description
SubSa code bits 1:0

When you turn on lite, write to this register to set the expected chroma sampling of the incoming video fields.

When you turn off lite and turn on Debug features, this register returns the SUBSA field from the most recently received image information packet.

unused 31:2 Unused.
Table 110.  IMG_INFO_COSITING
Name Bits Description
Cosite code bits 1:0

When you turn on lite, this register has no function.

When you turn off lite and turn on Debug features, this register returns the COSITE field from the most recently received image information packet.

unused 31:2 Unused.
Table 111.  IMG_INFO_FIELD_COUNT
Name Bits Description
Count bits 6:0

When you turn on lite, this register has no function.

When you turn off lite and turn on Debug features, this register returns the 7 bit FIELD_COUNT field from the most recently received image information packet.

unused 31:7 Unused.
Table 112.  STATUS
Name Bits Description
Status bit 0 1 means chroma resampler is processing a video field, 0 otherwise.
Pending register updates bit 1 1 means chroma resampler has pending updates, 0 otherwise
unused 31:2 Unused.
Table 113.  COMMIT
Name Bits Description
unused 31:0 Unused.
Table 114.  OUTPUT_MODE
Name Bits Description
Output subsampling 1:0 Output chroma sampling.
unused 31:2 Unused.