Intel Agilex® 7 FPGAs and SoCs Device Data Sheet: F-Series and I-Series

ID 683301
Date 12/04/2023
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HPS I2C Timing Characteristics

Table 89.  HPS I2C Timing Requirements For specification status, see the Data Sheet Status table
Symbol Description Standard Mode Fast Mode Unit
Min Max Min Max
Tclk Serial clock (SCL) clock period 10 2.5 μs
Tclk_jitter I2C clock output jitter 2 2 %
THIGH 109 SCL high period 4110 0.6111 μs
TLOW 112 SCL low period 4.7113 1.3114 μs
TSU;DAT Setup time for serial data line (SDA) data to SCL 0.25 0.1 μs
THD;DAT 115 Hold time for SCL to SDA data 0 3.15 0 0.6 μs
TVD;DAT and TVD;ACK 116 SCL to SDA output data delay 3.45117 0.9118 μs
TSU;STA Setup time for a repeated start condition 4.7 0.6 μs
THD;STA Hold time for a repeated start condition 4 0.6 μs
TSU;STO Setup time for a stop condition 4 0.6 μs
TBUF SDA high pulse duration between STOP and START 4.7 1.3 μs
Tscl:r 119 SCL rise time 1,000 20 300 ns
Tscl:f 119 SCL fall time 300 6.54 300 ns
Tsda:r 119 SDA rise time 1,000 20 300 ns
Tsda:f 119 SDA fall time 300 6.54 300 ns
Figure 16. I2C Timing Diagram
109 You can adjust Thigh using the ic_ss_scl_hcnt or ic_fs_scl_hcnt register.
110 The recommended minimum setting for ic_ss_scl_hcnt is 428. Refer to the related information for the SCL_High_time equation.
111 The recommended minimum setting for ic_fs_scl_hcnt is 75. Refer to the related information for the SCL_High_time equation.
112 You can adjust Tlow using the ic_ss_scl_lcnt or ic_fs_scl_lcnt register.
113 The recommended minimum setting for ic_ss_scl_lcnt is 464. Refer to the related information for the SCL_Low_time equation.
114 The recommended minimum setting for ic_fs_scl_lcnt is 163. Refer to the related information for the SCL_Low_time equation.
115 THD;DAT is affected by the rise and fall time.
116 TVD;DAT and TVD;ACK are affected by the rise and fall time, as well as the SDA hold time (set by adjusting the ic_sda_hold register).
117 Use maximum SDA_HOLD = 240 to be within the specification.
118 Use maximum SDA_HOLD = 60 to be within the specification.
119 Rise and fall time parameters vary depending on external factors such as the characteristics of the I/O driver, pull-up resistor value, and total capacitance on the transmission line.