Agilex™ 7 FPGAs and SoCs Device Data Sheet: F-Series and I-Series

ID 683301
Date 7/08/2024
Public
Document Table of Contents

Single-Ended SSTL, HSTL, HSUL, and POD I/O Reference Voltage Specifications

Table 24.  Single-Ended SSTL, HSTL, HSUL, and POD I/O Reference Voltage Specifications (for GPIO Bank) For specification status, see the Data Sheet Status table
I/O Standard VCCIO_PIO (V) VREF (V) VTT (V)
Min Typ Max Min Typ Max Min Typ Max
SSTL-12 1.14 1.2 1.26 0.49 × VCCIO_PIO 0.5 × VCCIO_PIO 0.51 × VCCIO_PIO 0.475 × VCCIO_PIO 0.5 × VCCIO_PIO 0.525 × VCCIO_PIO
HSTL-12 1.14 1.2 1.26 0.47 × VCCIO_PIO 0.5 × VCCIO_PIO 0.53 × VCCIO_PIO 0.475 × VCCIO_PIO 0.5 × VCCIO_PIO 0.525 × VCCIO_PIO
HSUL-12 1.14 1.2 1.26 0.49 × VCCIO_PIO 0.5 × VCCIO_PIO 0.51 × VCCIO_PIO
POD12 1.14 1.2 1.26 Internally calibrated VCCIO_PIO