Agilex™ 7 FPGAs and SoCs Device Data Sheet: F-Series and I-Series

ID 683301
Date 4/01/2024
Document Table of Contents

Bus Hold Specifications

The bus-hold trip points are based on calculated input voltages from the JEDEC* standard.

Table 15.  Bus Hold Parameters (for GPIO Bank) For specification status, see the Data Sheet Status table
Parameter Symbol Condition VCCIO_PIO (V) Unit
Min Max
Bus-hold, low, sustaining current ISUSL VIN > VIL (max) 50 µA
Bus-hold, high, sustaining current ISUSH VIN < VIH (min) –50 µA
Bus-hold, low, overdrive current IODL 0 V < VIN < VCCIO_PIO 1,400 µA
Bus-hold, high, overdrive current IODH 0 V < VIN < VCCIO_PIO –1,400 µA
Bus-hold trip point VTRIP 0.33 × VCCIO_PIO 0.67 × VCCIO_PIO V