L- and H-tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 3/07/2022
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6.3.4. Exit from D3 cold

  1. To issue a PM_EVENT Message from the D3 cold state, the device must first issue a wakeup event (WAKE#) to request reapplication of power and the clock.
    The wakeup event triggers a fundamental reset which reinitializes the link to L0.
  2. The Application Layer requests a wake-up event by asserting apps_pm_xmt_pme.
    Asserting apps_pm_xmt_pme causes the IP core to transmit a PM_EVENT Message. In addition, the IP core sets the PME_status bit in the Power Management Control and Status register to notify software that it has requested the wakeup.

    The PCIe Link states are indicated on the pm_* interface. The LTSSM state is indicated on the ltssm_state output.