L- and H-tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 3/07/2022
Document Table of Contents User Configurable Device and Board ID

Table 60.  User Configurable Device and Board ID - 0xB9C


Register Description

Default Value



Allows you to specify ID of the .sof file to be loaded.

From configuration bits RO

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