L- and H-tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 3/07/2022

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Document Table of Contents

3.7. Control Shadow Interface for SR-IOV

The control shadow interface provides access to the current settings for some of the VF Control Register fields in the PCI and PCI Express Configuration Spaces located in the SR-IOV Bridge.

Use the interface for the following reasons:

  • To monitor specific VF registers using the ctl_shdw_update output and the associated output signals.

  • To monitor all VF registers using the the ctl_shdw_req_all input to request a full scan of the register fields for all active VFs.
Note: This interface is used for VF registers only. PF registers' information can be accessed through the tl_cfg_* interface. Refer to Transaction Layer Configuration Space Interface for more details on the tl_cfg_* interface.