L- and H-tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 3/07/2022
Document Table of Contents

6.1.15. Configuration Extension Bus Interface

Use the Configuration Extension Bus to add capability structures to the IP core’s internal Configuration Spaces. Configuration TLPs with a destination register byte address of 0xC00 and higher route to the Configuration Extension Bus interface. Report the Completion Status Successful Completion (SC) on the Configuration Extension Bus. The IP core then generates a Completion to transmit on the link.

Use the app_err_info[8] signal included in the Transaction Layer Configuration Space Interface to report uncorrectable internal errors.

Note: The Configuration Extension Bus interface is not available if the parameter Enable SR-IOV Support under the Multifunction and SR-IOV System Settings tab is set to On.
Note: The IP core does not apply ID-based Ordering (IDO) bits to the internally generated Completions.




ceb_req Output When asserted, indicates a valid Configuration Extension Bus access cycle. Deasserted when ceb_ack is asserted.
ceb_ack Input Asserted to acknowledged ceb_req. The Application must implement this logic.


Output Address bus to the external register block. The width of the address bus is the value you select for the CX_LBC_EXT_AW parameter.
ceb_din[31:0] Input Read data.
ceb_cdm_convert_data[31:0] Input Acts as a mask. If the value of a bit is 1, overwrite the value of the VF register with the value of the corresponding PF register at that bit position. If the value is 0, do not overwrite the bit.

This signal is available for H-Tile only.

ceb_dout[31:0] Output Data to be written.
ceb_wr[3:0] Output

Indicates the configuration register access type, read or write. For writes, CEB_wr also indicates the byte enables: The following encodings are defined:

  • 4'b000: Read
  • 4'b0001: Write byte 0
  • 4'b0010: Write byte 1
  • 4'b0100: Write byte 2
  • 4'b1000: Write byte 3
  • 4'b1111: Write all bytes.

Combinations of byte enables, for example,4'b 0101b are also valid.

ceb_vf_num[10:0] Output The VF of the current CEB access.

This signal is available for H-Tile only.

ceb_vf_active Output When asserted, indicates a VF is active.

This signal is available for H-Tile only.

ceb_func_num[1:0] Output The PF number of the current CEB access.

This signal is available for H-Tile only.

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