L- and H-tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 3/07/2022
Public
Document Table of Contents

8.1.4.2. Intel Marker

Table 58.   Intel Marker - 0xB88

Bits

Register Description

Default Value

Access

[31:0]

Intel Marker - An additional marker for standard Intel programming software to be able to verify that this is the right structure.

0x41721172 RO

Did you find the information on this page useful?

Characters remaining:

Feedback Message