Low Latency Ethernet 10G MAC Intel® Arria® 10 FPGA IP Design Example User Guide

ID 683063
Date 1/11/2022
Document Table of Contents

1.3.1. Procedure

You can compile and simulate the design by running a simulation script from the command prompt.
  1. At the command prompt, change the working directory to <Example Design>\simulation\ed_sim\<Simulator> .
  2. Run the simulation script for the simulator of your choice.
  3. Simulator Working Directory Command
    ModelSim® <Example Design>/simulation/ed_sim/mentor vsim -c -do tb_run.tcl
    VCS* <Example Design>/simulation/ed_sim/synopsys/vcs sh tb_run.sh
    Xcelium* 1 <Example Design>/simulation/ed_sim/xcelium sh tb_run.sh
A successful simulation ends with the following message:
Simulation stopped due to successful completion! Simulation passed.
After successful completion, you can analyze the results.
1 Xcelium* simulator is supported in Intel® Quartus® Prime Pro Edition software only.