Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024

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6.2.4. In-System Sources and Probes

Traditional debugging techniques often involve using an external pattern generator to exercise the logic and a logic analyzer to study the output waveforms during run time. The Signal Tap Logic Analyzer and In-System Sources and Probes allow you to read or tap internal logic signals during run time to debug your logic design.

You can make the debugging cycle more efficient when you can drive any internal signal manually within your design, which allows you to perform the following actions:

  • Force the occurrence of trigger conditions set up in the Signal Tap Logic Analyzer.
  • Create simple test vectors to exercise your design without using external test equipment.
  • Dynamically control run time control signals(e.g. system reset) with the JTAG chain.