Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024
Document Table of Contents Hardware Design Flow

The following sections describe a step-by-step method for building a bootable system for a Nios® V processor application copied from configuration QSPI flash to RAM using SDM Bootloader. The example below is built using Stratix® 10 SX SoC L-Tile.

IP Component Settings

  1. Create your Nios® V processor project using Quartus® Prime and Platform Designer.
  2. Add the Mailbox Client Intel® FPGA IP into your Platform Designer system.
    Figure 48. Connections for Nios V Processor Project
    Figure 49. On-Chip Memory (RAM or ROM) Intel FPGA IP Parameter Settings
  3. Change the On-Chip Memory (RAM or ROM) Intel FPGA IP Parameter Settings according to the memory function. Ensure that you have the following memories in the system.
Memory Memory Type Total Memory Size

Memory initialization

Bootloader ROM

ROM (Read-only)

6144 bytes or more

Enable the following settings:
  • Initialize memory content
  • Enable non-default initialization file with bootcopier_rom.hex
Bootloader RAM

RAM (Writable)

6144 bytes or more

Leave all settings unchecked.
User Application RAM

RAM (Writable)

Depends on your application 4

Leave all settings unchecked.

Reset Agent Settings for Nios Processor

  1. In the Nios® V processor parameter editor, set the Reset Agent to Bootloader ROM.
    Figure 50.  Nios® V Processor Parameter Editor Settings
  2. Click Generate HDL, the Generation dialog box appears.
  3. Specify output file generation options and then click Generate.

Quartus® Prime Software Settings

  1. In the Intel Quartus Prime software, click Assignment > Device > Device and Pin Options > Configuration.
  2. Set Configuration scheme to Active Serial x4 (can use Configuration Device).
  3. Set VID mode of operation according to your board design.
  4. Set the Active serial clock source to 100 MHz Internal Oscillator.
    Figure 51. Device and Pin Options
  5. Click OK to exit the Device and Pin Options window.
  6. Click OK to exit the Device window.
  7. Click Start Compilation to compile your project.
4 Your application size varies according to the usage. Set the memory size according to your design.