Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

8.1. Introduction

The Nios® V/g processor supports custom instruction feature. This feature allows you to connect the processor to a custom processing engine (custom logic blocks). You can develop the processing engine to support the following functions:
  • Enable unimplemented instruction in the Nios® V Processor Instruction Set Architecture (ISA).
  • Perform hardware acceleration on software algorithms.
Altera recommends you to understand custom instruction feature in Nios® V processor by reading AN 977: Nios® V Processor Custom Instruction before proceeding with the example design.