Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024

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4.6.1. Nios® V Processor Application Executes in-place from OCRAM

The on-chip memory is initialized during FPGA configuration with data from a Nios® V processor application image. This data is built into the FPGA configuration bitstream. This process eliminates the need for a boot copier, as the Nios® V processor application is already in place at system reset.

Figure 70.  Nios® V Processor Application Executes In-Place from OCRAM when FPGA Device Configured from QSPI Flash
Figure 71. Design, Configuration and Booting Flow