Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024

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Document Table of Contents Configuring and Generating the BSP Project

  1. In the BSP Editor, go to Main > Settings > Advanced > hal.linker.
  2. Enable the following settings:
    • allow_code_at_reset
    • enable_alt_load
    • enable_alt_load_copy_rwdata
    Figure 119. hal.linker Settings
  3. Navigate to the BSP Linker Script tab in the BSP Editor.
  4. Set all the Linker Section Name list to the OCRAM.
  5. In the BSP Drivers, enable the device driver for Mailbox Client Intel® FPGA IP.
  6. Go to Settings > altera_s10_mailbox_client. You may set rsu_log_level as 0 for minimum logging information.
  7. Apply rsu_protected_slot as -1 for no slot protection.
  8. Enable the following settings:
    • rsu.enable_spt_checksum
    • rsu.enable_rsu
    • fpga_device.Stratix10
      Note: Select other options for fpga_device when you are not using the Stratix® 10 device.
    Figure 120. BSP Drivers Tab
  9. Click Generate BSP. Make sure the BSP generation is successful.
  10. Close the BSP Editor.