Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024
Document Table of Contents

2.2.1. Instantiating the Nios® V Processor System Module in the Quartus® Prime Project

The Platform Designer generates a system module design entity in which you can use to instantiate in Quartus® Prime. How you instantiate the system module depends on the design entry method for the overall Quartus® Prime project. For example, if you were using Verilog HDL for design entry, instantiate the Verilog based system module and if you prefer to use the block diagram method for design entry, instantiate a system module symbol .bdf file.