Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024

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Document Table of Contents GSFI Bootloader Example Design

Note: For Quartus® Prime Standard Edition software, refer to the topic Quartus® Prime Software Support to generate the example design.
You can download the GSFI bootloader example design from the Intel® FPGA Design Store. The example design is based on the Intel Arria 10 SoC Development Kit. Using the provided scripts, the hardware and software design are generated, and programmed respectively as SRAM Object Files (.sof) and JTAG Indirect Configuration Files (.jic) into the device.

Follow the steps below to generate the GSFI bootloader example design:

  1. Go to Intel® FPGA Design Store.
  2. Search for Arria10 - Bootloader GSFI Design package.
  3. Click on the link at the title.
  4. Accept the Software License Agreement.
  5. Download the package according to the Quartus® Prime software version of your host machine.
  6. Double-click to run the top.par file.
  7. top_project folder is created by default after running the PAR file.
  8. Open the top_project and refer to the readme.txt for how-to guide.
Table 27.  Example Design File Description
File Description
hw/ Contains files necessary to run the hardware project.
ready_to_test/ Contains pre-built hardware and software binaries to run the design on the target hardware. For this package, the target hardware is Arria® 10 SoC development kit.
scripts/ Consists of scripts to build the design.
sw/ Contains software application files.
readme.txt Contains description and steps to apply the pre-bulit binaries or rebuild the binaries from scratch.

Figure 44. GSFI Bootloader Example Design
Figure 45. JUART Terminal Output
  1. In the beginning, the window displays the following message:
  2. Reaching the end, the window displays the following message: