Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024
Document Table of Contents Custom Instruction Tab

Note: This tab is only available for the Nios® V/g processor core.
Custom Instruction Description
Nios V Custom Instruction Hardware Interface Table
  • Nios® V processor uses this table to define its custom instruction manager interfaces.
  • Defined custom instruction manager interfaces are uniquely encoded by an Opcode (CUSTOM0-3) and 3 bits of funct7[6:4].
  • You can define up to a total of 32 individual custom instruction manager interfaces.
Nios V Custom Instruction Software Macro Table
  • Nios® V processor uses this table is used to define custom instruction software encodings for defined custom instruction manager interfaces.
  • For each defined custom instruction software encoding, the Opcode (CUSTOM0-3) and 3 bits of funct7[6:4] encoding must correlate to a defined custom instruction manager interface encoding in the Custom Instruction Hardware Interface Table.
  • You can use funct7[6:4], funct7[3:0], and funct3[2:0] to define additional encoding for a given custom instruction, or specified as Xs to be passed in as additional instruction arguments.
  • Nios® V processor provides defined custom instruction software encodings as generated C-macros in system.h, and follow the R-type RISC-V instruction format.
  • Mnemonics may be used to define custom names for:
    • The generated C-Macros in system.h.
    • The generated GDB debug mnemonics in custom_instruction_debug.xml.