Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/13/2024
Document Table of Contents

6.3.1. Ashling* RiscFree* IDE for Intel® FPGAs

The Ashling* RiscFree* IDE for Intel® FPGAs is Ashling’s Eclipse* C/C++ Development Toolkit (CDT) based integrated development environment (IDE) for Intel FPGAs Arm* -based HPS and RISC-V based Nios® V processors. The Ashling* RiscFree* IDE for Intel® FPGAs is free of charge, and it provides a complete, seamless environment for C and C++ software development and has the following features:
  • Eclipse* CDT-based IDE with full source and project creation, editing, build, and debug support using the RISC-V GNU compiler collection (GCC) toolchain.
  • Project Manager and Build Manager, including Make and CMake support with rapid import, build, and debug of application frameworks created using the Quartus® Prime software.
  • RISC-V GNU GCC toolchain with support for newlib or picolibc run-time libraries using the Nios® V Hardware Abstraction Layer (HAL) API for hardware access.
  • Integrated support for Intel FPGA Download Cable II JTAG debug probe.
  • ROM or RAM based debugging support, for example, hardware breakpoints for flash-based support.
  • High-level Register Viewer based on industry-standard System View Description (SVD) files.
  • Integrated serial terminal