5.1.2. Remote System Update Using AS Configuration
Remote system update using AS configuration includes the following components:
- Your remote system update host design. The host can be custom logic, the HPS, or a Nios® II processor in the FPGA.
- One factory image.
- Flash memory for image storage.
- At least one application image.
- Designs that do not use the HPS as the remote system update host require a Mailbox Client Intel® FPGA IP as shown in the figure below. The Mailbox Client sends and receives remote system update operation commands and responses, such as QSPI_READ and QSPI_WRITE.
Figure 64. Intel® Stratix® 10 Remote System Update Components
Starting in version 19.2 of the Intel® Quartus® Prime software, a restriction applies to the following mailbox client IPs that access the SDM mailbox over an Avalon® Memory-Mapped ( Avalon® -MM) interface:
- Temperature Sensor
- Voltage Sensor
- Chip ID
- Serial Flash Mailbox Client
- Mailbox Client IP
- Advanced SEU Detection IP
- Partial Reconfiguration IP
If you use the Mailbox IP in designs compiled in Intel® Quartus® Prime Pro Edition software version 19.2 or later, you must only use SDM firmware starting from version 19.2 or later to configure the FPGA.
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